DesignGateway Hot! News October 2017

[ UDP1G/10G IP core ] Ideal for network applications that require broadcast and low latency!!
UDP1G/10G IP core are the epochal solution implemented without CPU. These IP cores are suitable for network application. This IP product includes reference design which helps you to reduce development time. DesignGateway provide demo binary file for Xilinx/Intel FPGA boards. You can evaluate UDP1G/10G-IP core on real board before purchasing.
Learn More (UDP10G-IP for Xilinx)	Learn More (UDP10G-IP for Intel)
Learn More (UDP1G-IP for Xilinx)	Learn More (UDP1G-IP for Intel)

Advantages of UDP1G/10G IP Support both Full Duplex & Half Duplex!! Support both High-speed half-duplex and full-duplex. Ideal for broadcast and low latency network applications UDP1G/10G IP core all hardware logic achieve minimum overhead and very low latency. It is suitable for Video-on-Demand via Broadcast and Real time Online game which requires both quick response for user operation and high-speed data downloading. Reduce Cost and Time!! UDP1G/10G IP core include reference design. It helps you to reduce develop time and cost. Free evaluation binary files are available for you to check the performance on real board before purchasing the IP core. UDP1G IP Presentation for Xilinx UDP1G IP Presentation for Intel

News [IFTD17] Design Gateway joins Intel® FPGA Technology Day 2017 Design Gateway joins Intel® FPGA Technology Day 2017 in Tokyo as Intel DSN Gold partner. We will show IP core demonstrations on Intel® Arria® 10 SX SoC board. Date: 11 Oct 2017 (Wed) 10:00 - 17:55 Place: Solacity Conference Center, Tokyo Japan Learn More (Japanese) Technical Updates UDP10G-IP Intel Datasheet Rev1.0 - New Reference Design Document Rev1.0 - New Demo Instruction Document Rev1.0 - New Xilinx Datasheet Rev1.0 - New Reference Design Document Rev1.0 - New Demo Instruction Document Rev1.0 - New NVMe-IP Intel 2ch RAID0 Reference Design Document Rev1.0 - New 2ch RAID0 Demo Instruction Document Rev1.0 - New. * Reflex Alaric Board is also available! SATA-IP Xilinx FAT32 IP core for SATA HOST IP, Datasheet Rev1.0 - New Event CEATEC JAPAN 2017 Date: 3-6 Oct 2017 Place: Makuhari Messe, Japan Learn More All about Photonics Date: 4-6 Oct 2017 Place: Makuhari Messe, Japan Learn More Design Engineering & Manufacturing Solutions Expo Osaka (DMS Osaka) Date: 4-6 Oct 2017 Place: INTEX Osaka, Japan Learn More TAITRONICS 2017 Date: 2017年10月11日(水)～14日(土) Place: Taipei Nangang Exhibition Center Learn More Broadcast India Show 2017 Date: 12-14 Oct 2017 Place: The Bombay Exhibition Centre, Mumbai India Learn More electronicAsia Date: 13-16 Oct 2017 Place: Hong Kong Convention & Exhibition Centre, Hong Kong Learn More 2017 Korea Electronics Show (KES2017) Date: 17-20 Oct 2017 Place: COEX, Korea Learn More Privacy Protection Policy DesignGateway recognizes the importance of personal information protection, and strive to protect personal information. We absolutely do not transfer it to a third party. Distributed stop / Address change / Register If you do not wish us to send or if your E-mail address is changed, please contact following page. https://dgway.com/mailmaga_E.html Publisher DesignGateway Co., Ltd. http://www.design-gateway.com/ Mail：ip-sales@design-gateway.com | About Us| Contact| (c) 2016 Design Gateway Co., Ltd.