Design Gateway NVMe-IP for Gen5 enables direct, hardware-based access to four PCIe Gen5 NVMe SSDs in RAID0 mode on the Intel Agilex™ 7 I-Series board, delivering ultra-high write throughput for real-time data recording applications. CPU-based NVMe solutions are constrained by software overhead, OS latency, and PCIe protocol stack processing. Design Gateway's FPGA-based NVMe-IP eliminates these bottlenecks by implementing the entire NVMe and PCIe protocol stack in dedicated silicon logic — delivering deterministic, maximum-throughput storage access.
The NVMe-IP core drives PCIe Gen5 bandwidth directly from FPGA logic without any CPU, OS scheduler, or driver stack in the data path. Every byte of available SSD bandwidth is exploited.
The RAID0 controller is implemented in programmable logic, making it trivially scalable. 2-channel, 4-channel, or custom configurations can be achieved with only logic modifications — no hardware changes.
On-chip memory buffers (up to 1 MB RAM) inside the NVMe-IP eliminate the need for external DDR, reducing board size, power consumption, and BOM cost — enabling ultra-compact embedded designs.
A free evaluation demo file is available for immediate download. The reference design cuts development time from months to days, with complete documentation, firmware, and board setup instructions included.
The 40 GB/s write capability of the 4-channel RAID0 NVMe Gen5 system opens real-time data capture and storage use cases that were previously only achievable with large rack-mounted server arrays.
Continuous capture of wideband RF signals and radar returns at 40 GB/s for post-mission analysis and SIGINT processing.
High-integrity recording of multi-channel avionics, navigational, and structural health monitoring data streams.
Compact FPGA + NVMe SSD integration for onboard recording of multi-spectral imaging, LiDAR, and telemetry in SWaP-constrained platforms.
Lossless recording of full 400 Gbps Ethernet traffic for network forensics, protocol analysis, and fault detection without dropping a single packet.
Capture and replay of PCIe, CXL, and Ethernet protocol transactions at Gen5 speeds for device characterization and standards certification.
Broadband RF and IF signal capture from ADC arrays enabling deep post-capture analysis of transient phenomena and spectrum monitoring.
40 GB/s write throughput supports uncompressed 16K video recording at up to 100 fps — enabling broadcast, cinema, and scientific imaging.
Simultaneous capture of multiple uncompressed 4K/8K streams from broadcast cameras or industrial vision arrays into a single compact recorder.
FPGA-based hardware encoding pipelines stream transcoded video directly to NVMe RAID storage without CPU involvement at broadcast quality.
| FPGA Development Kit | Altera Agilex™ 7 I-Series Development Kit (DK-DEV-AGI027-RA) |
| SSD Interface Adapter | Design Gateway AB19-M2PCI — PCIe Gen5 M.2 adapter, supports up to 4 NVMe SSDs |
| NVMe SSDs | 4× M.2 NVMe PCIe Gen5 SSDs (e.g., Gigabyte Aorus 10000, Crucial T700) |
| PC | Windows or Linux PC (for configuration and terminal) |
| IP Core | NVMe-IP for Gen5 (NVMe-IP-A7I) × 4 + RAID0 Controller |
| Reference Design | 4-Ch RAID0 NVMe-IP for Gen5 Reference Design |
A free evaluation demo file for the Agilex™ 7 I-Series is publicly available. Download and verify 40 GB/s performance on real hardware before purchasing the IP core license.
For more details, please refer to the demo video and documentation published on our website.