UDP1G IP core is the epochal solution implemented without CPU. This IP core is suitable for network application. This IP product includes
reference design for Xilinx FPGA. It helps you to reduce development time.
DesignGateway provide demo file for Xilinx FPGA boards. You can evaluate
UDP1G-IP core on real board before purchasing.
- All hardware logic to achive CPU-less system
- Support IPv4 protocol
- Support one port connection
- Transmit/Receive buffer size, programmable on HDL for optimized resource
- Simple data interface by standard FIFO interface
- Simple control interface by standard register interface
- One clock domain interface by fixed 125 MHz clock frequency
- Provide free evaluation bit file for FPGA Development Kits (1 hour time
- Rerference design is included in IP core product
Document & Demo bit file download
|UDP1G-IP core Presentation
|UDP1G-IP core Datasheet
|Reference Design Document
|Demo Instruction Document
|Evaluation bit file & Apps for PC
| Demo Video
Free bit file for evaluation
DesignGateway provide 1-hour limitation bit file for Xilinx FPGA Development
Boards. You can evaluate UDP1G-IP core on real board before purchasing.