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1 Overview 2 Hardware 2.1 Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) 2.2 EMACMonitor 2.3 TOEMACIF 2.4 AxiSSw3to1 2.5 TOE200GADV-IP 2.6 User2MAC 2.6.1 UserTxMAC 2.6.2 UserRxMAC 2.7 CPU and Peripherals 2.7.1 AsyncAxiReg 2.7.2 UserReg 3 CPU Firmware (FPGA) 3.1 Test Firmware (toexgadvtestc) 3.1.1 Display Parameters 3.1.2 Reset Parameters 3.1.3 Half Duplex Test 3.1.4 Full Duplex Test 3.1.5 Ping Reply Test 3.2 Function List in Test Firmware 3.2.1 Function for High-Speed Connection 3.2.2 Function for Low-Speed Connection 4 Test Software (PC) 4.1 “tcpdatatest” Application (Half Duplex Test) 4.2 “tcp_client_txrx_single” Application (Full Duplex Test) 5 Revision History Return to Top

TOE200GADV-IP Reference Design Manual

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