Aerospace

FPGA devices are highly versatile, allowing for seamless adaptation to evolving standards, making them a crucial choice for mission-critical applications like Aerospace. They boast high reliability and radiation hardening features, ensuring optimal performance even in challenging environments.

In the realm of Aerospace, the need for efficient Data Storage, Networking, and Security solutions is paramount. FPGA-based Design Gateway IP cores address these needs, offering a strategic advantage. These cores optimize performance, energy usage, and resource allocation, making them ideal for high-performance applications in Aerospace.

Unleash Real-Time Aerospace Data Processing
Blazing-Fast FPGA Solution Records & Processes Space & Defense Data Instantly

Key Advantages

Industrial Applications use cases for AES-GCM 100G IP Core

In satellite communication, data security is paramount. The AES-GCM IP Core on FPGA can be implemented to encrypt data before it is transmitted to the satellite constellation network or the ground station.

High bandwidth & secure space-to-ground communication

Satellite mesh constellation network

Communication/Internet satellites necessitate high-bandwidth and low-latency communication throughout a mesh constellation network. Each intercommunication link can attain speeds of 100Gbps or more by utilizing AES-GCM on FPGA. This ensures confidentiality, data integrity, and protection against side-channel attacks, all while maintaining high-speed communication.

Examples of DG’s IP Core Applications

Space
exploration system

Satellite
tracking station

Base
station system

Radar
system

Marine
sonar

Success Stories & Application Example

Key Factors

  • NVMe with PCIe Gen3 soft IP (NVMeG3-IP) to support FPGA which does not have PCIe hard IP
  • PCIe switch option to support connecting both FPGA and GPU
  • Reference design to shorten development time

Key Factors

  • NVMe with PCIe Gen3 soft IP (NVMeG3-IP) to support FPGA which does not have PCIe hard IP
  • PCIe switch option to support connecting both FPGA and GPU
  • Reference design to shorten development time